Alice & Bob Demonstrates GPU Decoding for LDPC-Cat Codes via NVIDIA NVQLink

Fault-tolerant quantum computing developer Alice & Bob has presented proof-of-concept results demonstrating the decoding of its LDPC-cat quantum error correction architecture on NVIDIA GPUs using the low-latency NVQLink system architecture.

The demonstration evaluated the transfer of synthetic measurement data from Quantum Machines' OPX1000 control hardware to GPUs using the Open Acceleration Stack, establishing microsecond-scale roundtrip communication pathways between quantum control systems and classical GPU supercomputers. NVQLink provides a high-throughput, tight-coupling interface designed to accelerate real-time error-correction decoding, calibration, and hybrid quantum-classical workloads.

Alice & Bob's LDPC-cat architecture leverages cat qubits, which inherently suppress physical bit-flip errors exponentially through continuous non-linear dissipation. By pairing cat qubits with 2D low-density parity-check (LDPC) codes, the architecture enables 100 logical qubits to be implemented on a 758 cat-qubit chip with logical error rates below 10^-8 per cycle.

Although the initial demonstration utilized synthetic data off-line rather than real-time QPU feedback, it validates parallel syndrome decoding efficiency across GPU clusters, building upon Alice & Bob's decoupled AI control topologies to resolve microsecond latencies for cat qubits and Bull's partnership to integrate cat qubit processors into HPC supercomputing infrastructure.

Review the announcement on the Alice & Bob Newsroom here and examine the foundational 2D LDPC-cat architecture research in Nature Communications here.

October 14, 2026