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October 23, 2026Mohamed Abdel-Kareem

Chalmers University Demonstrates TRIO Pulses for Control-Error-Robust Single-Qubit Gates in Superconducting Processors

Chalmers University of Technology has developed TRIO pulses, a new quantum control framework for superconducting processors. …

Chalmers University Demonstrates TRIO Pulses for Control-Error-Robust Single-Qubit Gates in Superconducting Processors

A research team led by the Wallenberg Centre for Quantum Technology (WACQT) at Chalmers University of Technology, in collaboration with Université Bourgogne Europe and Aalto University, has introduced and experimentally validated a quantum control framework termed Time-Rescaling Robust Inverse-Optimal (TRIO) pulses. Detailed in a research manuscript published on arXiv ("Optimal robust single-qubit gates in superconducting quantum processors"), the technique creates single-qubit gate envelopes that remain resilient against simultaneous control-amplitude miscalibrations and frequency detuning errors.

Tested on a superconducting transmon processor, a 90-nanosecond TRIO X-gate achieved an Interleaved Randomized Benchmarking (IRB) fidelity of 99.90%, while maintaining gate fidelities above 99.5% under simultaneous drive-amplitude variations of up to 20% and qubit detuning shifts of up to 4 MHz. Compared to standard Derivative Removal by Adiabatic Gate (DRAG) Gaussian pulses, TRIO pulses expand the parameter range for high-fidelity execution by an order of magnitude, offering a pathway to reduce periodic re-calibration overheads in large-scale quantum processors.

[ TRIO vs. Conventional Gaussian Single-Qubit Gate Benchmarks ]

Control Envelope / Gate Type

Peak Gate Fidelity (90 ns)

Fidelity under 20% Amp & 4 MHz Detuning

Energy / Pulse Area Metrics

• Gaussian X-Gate (DRAG Calibrated)

• 99.94(1)%

• ~92.0% (Narrow, sensitive tolerance window)

• Baseline pulse area (π)

• TRIO X-Gate (Robust Inverse-Optimal)

• 99.90(1)%

• > 99.5% (Order-of-magnitude wider tolerance)

• EXopt = 3.461π (Pulse Area = 3.093π)

• Gaussian H-Type Gate (Hadamard)

• 99.92(1)%

• Standard decay under drive distortion

• VZ(π) Y-π/2 construction

• TRIO H-Type Universal Set (Xπ/2, Y-π/2)

• 99.60% – 99.69%

• Maintained robust plateau across parameter sweeps

• EHopt = 5.633π (Pulse Area = 3.395π)

Time-Rescaling Inverse Optimization and DRAG Integration

Classical Robust Inverse-Optimal (RIO) pulse designs rely on inverse trajectory engineering in two-level systems, which often yields sharp, square-like waveform features that suffer distortion in finite-bandwidth microwave hardware and induce leakage into upper transmon states. The TRIO protocol overcomes this limitation by applying a time-rescaling function g(τ) to map energy-optimal Bloch-sphere trajectories onto smooth, hyper-Gaussian envelopes (ΩTR(τ)). This retains the underlying trajectory geometry while eliminating high-frequency spectral components.

The smooth TRIO pulse is further integrated with first-order DRAG corrections to mitigate higher-level transmon leakage and AC Stark shifts. The resulting complex envelope is synthesized via in-phase and quadrature (IQ) microwave phase modulation, allowing the Rabi frequency and detuning to continuously compensate accumulated errors across the trajectory.

The research team extended the TRIO framework beyond single π-rotations to create a universal single-qubit gate set (including Xπ/2 and Y-π/2 Hadamard-type operations), demonstrating average fidelities of 99.69% for Y-π/2 and 99.62% for Xπ/2. Numerical simulations indicate that applying TRIO control to physical systems with higher anharmonicity (such as 1 GHz fluxonium qubits) yields gate errors below 10-6.

Inspect the preprint on arXiv here and review the research announcement on Giovanna Tancredi's LinkedIn post here.

October 22, 2026

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Chalmers University Demonstrates TRIO Pulses for Control-Error-Robust Single-Qubit Gates in Superconducting Processors | Quantum Computing Report