D-Wave Introduces Gate-Model Quantum Simulator for Error-Aware Programming

Dual-platform provider D-Wave Quantum Inc. (NYSE: QBTS) has announced a gate-model quantum computing simulator specifically designed for error-aware programming. Moving beyond traditional simulation tools that abstract away hardware imperfections, the platform is engineered to give developers explicit visibility into physical system errors, allowing them to map out, analyze, and mitigate real-world quantum processor behaviors during the application design phase. The architecture is built around D-Wave's proprietary dual-rail superconducting technology, establishing an operational testbed for engineers to refine software routines ahead of the commercial rollout of the company's upcoming physical gate-model hardware.

The simulator integrates directly with D-Wave’s Ocean Software Development Kit (SDK) and will support configurations of up to 21 qubits. By utilizing built-in hardware emulation modes alongside Monte Carlo simulations of real-time quantum dynamics, the system provides users with continuous data readouts and dynamic, real-time control parameters. This visibility allows software researchers to systematically prototype error-correction routines and model how phase changes alter circuit performance under actual hardware constraints. The technical framework aims to compress development timelines for industrial quantum chemistry and optimization algorithms by replacing open-loop theoretical math with closed-loop, noise-aware code verification.

Scheduled to launch in September 2026 via the Leap quantum cloud platform, the simulator will be commercialized through tiered subscription packages. D-Wave will offer "Starter" and "Premium" quantum development bundles that combine fixed monthly cloud computing allocations with targeted onboarding support from the company's engineering team, providing enterprise and public-sector clients with baseline budget predictability. The virtual launch builds upon D-Wave's dual-track hardware roadmap—funded in part by a recent $100 million U.S. CHIPS Act Letter of Intent—which aims to scale its established annealing infrastructure alongside a multi-qubit, fault-tolerant gate-model system.

The official, technical product announcement detailing the system architecture parameters can be reviewed here. Customers can sign up here to request future access to D-Wave’s forthcoming gate-model quantum simulator and systems.

June 18, 2026