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October 1, 2026Mohamed Abdel-Kareem

D-Wave Launches Gate-Model Simulator Beta Program Featuring 21-Qubit Dual-Rail Erasure Emulation

D-Wave has launched a beta program for its gate-model quantum computing simulator, accessible via its Leap quantum cloud service. …

D-Wave Launches Gate-Model Simulator Beta Program Featuring 21-Qubit Dual-Rail Erasure Emulation

Dual-platform quantum computing provider D-Wave Quantum Inc. (NASDAQ: QBTS) has launched a beta program for its gate-model quantum computing simulator. Accessible via D-Wave’s Leap quantum cloud service and Ocean software development kit (SDK), the simulator provides selected commercial and research organizations with early access to error-aware programming capabilities ahead of general availability and future physical hardware deployments.

According to D-Wave technical specifications, the simulator supports circuit emulation up to 21 qubits operating in two execution modes: an Ideal Mode for rapid algorithm construction and validation, and a Hardware Emulation Mode powered by a Monte Carlo simulation engine to model stochastic, real-time system dynamics and error-detection control flow. The software environment is programmable via the Ocean SDK, D-Wave's Quantum Circuit Description Language (QCDL) API, and Qiskit integrations.

The simulator models D-Wave’s dual-rail superconducting cavity qubit (DRQ) architecture, which leverages hardware-level error detection to convert primary photon-loss events into erasures at known spacetime locations. This erasure-conversion framework enables quantum error correction (QEC) routines to operate with reduced physical-to-logical qubit overhead. The simulator's underlying entangling gate mechanism was validated in peer-reviewed research published in Nature, demonstrating fast, high-fidelity two-qubit operations that preserve erasure-tracking signatures.

[ D-Wave Gate-Model Simulator Technical Specifications & Cohort ]

Technical Domain

Simulator Specification & Access Layer

Cohort Focus & Operational Scope

• Capacity & Execution Modes

• Up to 21 qubits • Ideal Mode & Hardware Emulation Mode

• Monte Carlo simulation of stochastic real-time quantum dynamics and control flow

• Underlying Architecture

• Dual-rail superconducting cavity qubit (DRQ) • Hardware-level erasure error tracking

• Evaluates physical noise models, mid-circuit error signals, and real-time QEC control

• Software & API Integration

• Leap Cloud Platform & Ocean SDK • QCDL API & Qiskit compatibility

• Offers development bundles combining simulator access, QPU time, and technical support

• Financial Services Cohort

• BBVA & FirstQFM

• Application testing for portfolio optimization, options pricing, fraud detection, and foundation models

• Research & HPC Cohort

• Jülich Supercomputing Centre (JSC) • Florida Atlantic University (FAU)

• Robustness of quantum machine learning (QML) models under realistic noise; QEC workforce development

Initial beta participants include financial institutions BBVA and FirstQFM, alongside academic and high-performance computing centers Florida Atlantic University (FAU) and the Jülich Supercomputing Centre (JSC). Program objectives focus on evaluating mid-circuit error detection, testing real-time classical feedback control, and establishing practical design rules for quantum machine learning (QML) algorithms operating under physical hardware noise constraints.

Review the official corporate release on the D-Wave Newsroom here, inspect technical specifications in the D-Wave Gate-Model Simulator Product Sheet here, explore simulator access details via the D-Wave Gate-Model Simulator Portal here, and examine our previous coverage on D-Wave's dual-rail entangling gate breakthrough in Nature here.

October 1, 2026

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D-Wave Launches Gate-Model Simulator Beta Program Featuring 21-Qubit Dual-Rail Erasure Emulation | Quantum Computing Report